Abstract: The conventional method of achieving PID by FPGA consumes a lot of multiplier, adder and memory. FPGA hardware resources can not be reasonably used, and system holds high energy consumption. Research on using direct DA ( DA-Ⅰ) and improved DA ( DA-Ⅱ) algorithm by FPGA to realize the digital PID controller. Compared with the conventional method, DA-Ⅰ algorithm saves many hardware resources；because of using adder, LUT unit and time delay module etc, DA-Ⅱ algorithm can reduce the unit modules further and reduce energy consumption by the application of two stage pipeline technology. Through the comparison of PID controller by the DA-Ⅰ and DA-Ⅱ algorithm, discussed the improved PID controller performance about the hardware resource, processing speed, complexity and energy consumption etc.

Key words: 　FPGA , Digital PID , Controller

摘要：         用常规的方法在ＦＰＧＡ上实现ＰＩＤ控制器，要消耗大量的乘法器、加法器和存储器，ＦＰＧＡ的硬件资源不能被合理地利用，而且能耗高。研究在ＦＰＧＡ上采用直接ＤＡ（ＤＡ－Ⅰ）及改进的ＤＡ（ＤＡ－Ⅱ）算法，实现数字ＰＩＤ控制器。ＤＡ－Ⅰ算法用的加法器、ＬＵＴ单元和延时模块等，较常规方法要节省许多硬件资源；ＤＡ－Ⅱ算法，能进一步减少各单元模块的使用，并应用两级流水线技术，降低能耗。通过对ＤＡ－Ⅰ和ＤＡ－Ⅱ两种算法实现的ＰＩＤ控制器的比较，在硬件资源、处理速度、复杂程度和能耗等方面，探讨了改进后的ＰＩＤ控制器的性能。

关键词: 　现场可编程门阵列 , 　数字ＰＩＤ , 　控制器